Analysis and Synthesis of Logic Functions using Decoders            

Aim of experiment

  • The objective of Part 1 of the experiment is to fully understand the functionality of active low 3 line to 8 line Decoder using 74138 IC and to show how according to select inputs and three enable inputs the active low outputs(Y0 toY7) will be enabled or disabled.
  • The objective of Part 2 of the experiment is to understand the functionality of an active 4-to-16 active low decoder implemented by cascading two 74138 ICs.